发明名称 Symbolic calculation system, symbolic calculation method and parallel circuit simulation system
摘要 The coefficient matrix, corresponding to the simultaneous linear equations to be solved, is divided into a plurality of row sets. The row sets as divided are processed in a parallel fashion, and entries specifying the nonzero elements contained in the first to n<th >row sets are added to the entry sets E1 to En. Moreover, in regard to each row set, fill-ins which take place at the time of eliminating the i<th >variable are obtained in a parallel fashion, and entries specifying the fill-ins are added to the entry sets E1 to En. The coefficient matrix is compressed using those entry sets E1 to En.
申请公布号 US6636828(B1) 申请公布日期 2003.10.21
申请号 US19990307977 申请日期 1999.05.10
申请人 NEC ELECTRONICS CORP. 发明人 HACHIYA KOUTARO
分类号 G06F17/50;G06F7/38;G06F17/12;(IPC1-7):G06F7/38 主分类号 G06F17/50
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