发明名称 |
Semiconductor integrated circuit device |
摘要 |
A semiconductor integrated circuit device for minimizing clock skew over clock wiring shortened for reduced wiring delays. A plurality of stages of clock drivers are provided on clock wiring paths ranging from a clock generator to flip-flops. Clock lines connecting upper stage clock drivers are equalized in length in the form of a tree structure, and clock lines connecting lower stage clock drivers are made as short as possible.
|
申请公布号 |
US6636095(B2) |
申请公布日期 |
2003.10.21 |
申请号 |
US20020238716 |
申请日期 |
2002.09.11 |
申请人 |
HITACHI, LTD. |
发明人 |
NITTA YUSUKE;HATTORI TOSHIHIRO |
分类号 |
H01L21/822;G06F1/10;H01L27/04;H03L7/00;(IPC1-7):H03K19/096 |
主分类号 |
H01L21/822 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|