发明名称 SRAM layout for relaxing mechanical stress in shallow trench isolation technology
摘要 An SRAM device has STI regions separated by mesas and doped regions including source/drain regions, active areas, wordline conductors and contacts in a semiconductor substrate is made with a source region has 90° transitions in critical locations. Form a dielectric layer above the active areas. Form the wordline conductors above the active areas transverse to the active areas. The source and drain regions of a pass gate transistor are on the opposite sides of a wordline conductor. Form the sidewalls along the <100> crystal plane. Form the contacts extending down through to the dielectric layer to the mesas. Substrate stress is reduced because the large active area region formed in the substrate assures that the contacts are formed on the <100> surfaces of the mesas are in contact with the mesas formed on the substrate and that the <110> surfaces of the silicon of the mesas are shielded from the contacts.
申请公布号 US6635936(B1) 申请公布日期 2003.10.21
申请号 US20000616975 申请日期 2000.07.14
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 WUU SHOU-GWO;LEE JIN-YUAN;YAUNG DUN-NIAN;LEE JENG-HAN
分类号 H01L27/11;(IPC1-7):H01L29/76 主分类号 H01L27/11
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