| 摘要 |
An improved differential integrator and related circuitry is disclosed. In one exemplary embodiment, the improved differential integrator comprises an integrating gain boosted cascode circuit for receiving an input signal having a first locking time and for generating an output signal having a second locking time, wherein the second locking time being delayed by a predetermined amount from the first locking time. The improved differential integrator may also comprise a multi-node common-mode feedback circuit, and a dynamic cascode common-mode feedback circuit. The integrating gain boosted cascode circuit may include a gain boosted cascode structure and a capacitor compensation structure. The multi-node common-mode feedback circuit may include a folded cascode circuit. The dynamic cascode common-mode feedback circuit may include a cascode circuit that uses common-mode feedback.
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