发明名称 FET AND MANUFACTURING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To provide a FET whose occupied area is reduced, and to provide a method for manufacturing it. SOLUTION: A FET 1 is provided to a semiconductor substrate 2 and comprises a source (source region) 4, a drain (drain region) 5, a first gate (first gate electrode) 6a and a second gate (second gate electrode) 6b separated from each other. The first gate 6a and the second gate 6b are provided with respect to the same (common) source 4 and the same (common) drain 5. The first gate 6a and the second gate 6b are separated from each other by a specified distance in the channel width direction and are further arranged side-by-side in the channel width direction. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003298046(A) 申请公布日期 2003.10.17
申请号 JP20020097094 申请日期 2002.03.29
申请人 MITSUMI ELECTRIC CO LTD 发明人 ONODERA SHIGEKI
分类号 H01L21/76;H01L21/8234;H01L27/088;H01L29/78;(IPC1-7):H01L29/78;H01L21/823 主分类号 H01L21/76
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