发明名称 BARE CHIP AND ELECTRIC COMPONENT MOUNTED WITH THE BARE CHIP
摘要 PROBLEM TO BE SOLVED: To mount a bare chip on the substrate of a counterpart without bringing adjoining bumps into contact with a lead wire passing between them with relatively gentle alignment accuracy at the time of face-mounting the bumps of the bare chip on the lead wires that are formed at fine pitches of 40μm or smaller on the mounted face side in a staggered arrangement. SOLUTION: In face-mounting a bare chip 10 on lead wires 21, the bump arrangement of the bare chip 10 is a staggered arrangement in which first and second rows are relatively offset by half a pitch. With the width W of each bump 11 and the distance L between the adjoining bumps 11 and 11, the relation between the width W and the distance L in each row is L-W=6 to 20μm. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003297865(A) 申请公布日期 2003.10.17
申请号 JP20020095443 申请日期 2002.03.29
申请人 OPTREX CORP 发明人 TAKAHASHI SHINTARO
分类号 H01L21/60;(IPC1-7):H01L21/60 主分类号 H01L21/60
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