发明名称 METHOD FOR MANUFACTURING SLOPED FLOATING GATE OF NONVOLATILE MEMORY CELL
摘要 PURPOSE: A method for manufacturing a sloped floating gate of a nonvolatile memory cell is provided to be capable of simplifying manufacturing processes without forming a buffer oxide layer and a hard mask. CONSTITUTION: A tunnel oxide layer(102) is formed on a semiconductor substrate(100). A conductive layer is deposited on the tunnel oxide layer(102). The first mask pattern is formed to define the first and second plane corresponding to the width direction of a floating gate. A conductive pattern(104') having a slope plane(104a) is formed by patterning the conductive layer using the first mask pattern as a mask. After removing the first mask pattern, the second mask pattern is formed to define the third and fourth plane corresponding to the length direction of the floating gate. Then, the conductive pattern(104') is selectively etched by using the second mask pattern as a mask.
申请公布号 KR20030080319(A) 申请公布日期 2003.10.17
申请号 KR20020018889 申请日期 2002.04.08
申请人 ANAM SEMICONDUCTOR., LTD. 发明人 SEO, YEONG HUN
分类号 H01L21/8247;(IPC1-7):H01L21/824 主分类号 H01L21/8247
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