| 摘要 |
PROBLEM TO BE SOLVED: To provide a ferroelectric memory device in which test data written are into all memory cells at high speed with write conditions being uniform for all of the memory cells to perform a test. SOLUTION: A memory cell array 1 has a ferroelectric capacitor of which one end is connected to bit lines BL, BBL via a transistor and the other end is connected to plate lines PL, BPL. A sense amplifier (SA) 2 has a first sense node BLSA and a second sense node BBLSA connected to the pair of bit lines BL, BBL. A switching circuit 11 for writing data '1' in the same memory cell by swapping bit line data after reading data '0' is provided between the pair of bit lines BL, BBL and the sense nodes BLSA, BBLSA to write test data if all '1'. COPYRIGHT: (C)2004,JPO
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