| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor storage device which can adjust the wiring width of distributed wirings depending on a current value, flowing into a gate wiring and signal delay of gate wiring and can allocate the wirings other than the distributed wirings within the same wiring layer as the distributed wirings, without increasing the wiring layer. SOLUTION: The semiconductor storage device comprises a memory cell group, in which a unit cell is formed by respectively connecting both ends of a ferroelectric capacitor C to the source and drain of a cell transistor T and a plurality of unit cells are connected in series, a plurality of gate wirings WL0 to WL7 connected to the gates of the cell transistors of the memory cell group, and a plurality of distributed wirings M3, allocated in the layer different from the above gate wiring in parallel with the gate wirings, are connected to the corresponding gate wirings WL0 to WL7. Sum of the wiring width and wiring interval of the gate wirings WL0 to WL7 is different from the sum of the wiring width and wiring interval of the distributed wirings M3. COPYRIGHT: (C)2004,JPO
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