| 摘要 |
PROBLEM TO BE SOLVED: To speed up the write-in processing of data to an actual memory through a cache memory. SOLUTION: A CPU 10 performs a write-in address set and a data write-in number set in a writing area 21 within the actual memory 20, and successively, determines the cache part of the actual memory 30 which a cache memory 30 accesses as a cache hit area 31 based on a in-cache-0-clear instruction. The CPU 10 further repeatedly performs a write-in data set and a data write-in instruction until the write-in number is a value shown by the data write-in number set in write-in number determination. COPYRIGHT: (C)2004,JPO
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