| 摘要 |
PROBLEM TO BE SOLVED: To provide a ferroelectric memory device which uses a wiring integrated structure having little memory characteristics deterioration. SOLUTION: A plurality of transistors T connected jointly in series are formed to have a diffused layer 12 by adjacent transistors on a silicon substrate 10. A gate 11 constitutes a word line. The transistor T is coated with an interlayer insulating film 14 and is formed with a ferroelectric capacitor C, corresponding to the transistor T on the film 14. A lower electrode 21 of the capacitor C is connected to the layer 12 via a contact plug 15. A connection wiring 25 for connecting an upper electrode 23 of the capacitor C to the layer 12 is formed by a first layer metal on an interlayer film 24 coating the capacitor C, and a shunt wiring 26 for short circuiting the word line is formed. A bit line 28 by a second layer metal is formed on the wiring 26 via a second layer metal. COPYRIGHT: (C)2004,JPO
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