发明名称 |
CIRCUIT SIMULATION DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To provide a circuit simulation device in which a transient convergence error to be caused due to discontinuity of circuit element models is prevented, in transient analysis of a large-scale analog/digital mixed loading circuit in which many circuit element models of functional description in an analog circuit description language are incorporated. SOLUTION: A frequency of a circuit is suppressed by incorporating a continuity enhancement element model 101 for enhancing the continuity of outputted waveforms by cutting high frequency components of the outputted waveforms of the circuit element models constituting the circuit and an automatic connection means 102 for automatically connecting the continuity enhancement element model 101 with output terminals of the circuit element models in the circuit simulation device. COPYRIGHT: (C)2004,JPO
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申请公布号 |
JP2003296388(A) |
申请公布日期 |
2003.10.17 |
申请号 |
JP20020104595 |
申请日期 |
2002.04.08 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
TOKUNAGA YUSUKE;MICHIMASA SHIRO;UMEHARA KEIJIRO |
分类号 |
G06F17/50;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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