发明名称 |
BITLINE CONTACTS IN A MEMORY CELL ARRAY |
摘要 |
The present invention provides a method for providing bitline contacts in a memory cell array which comprises a plurality of bitlines (2) arranged in a first direction, said bitlines (2) being covered by an isolating layer (3), a plurality of wordlines (4) arranged in a second direction perpendicular to said first direction above said bitlines, memory cells being disposed at the points at which said bitlines (2) and word-lines (4) cross each other. According to a first aspect of the present invention, the isolating layer (3) is removed from the bitlines (2) at the portions which are not covered by the wordlines (4), whereas the areas between the bitlines (2) remain unaffected. Alternatively, the isolating layer (3) is removed from the whole cell array. Then, an electrical conductive material (18) is provided on the exposed portions of said bitlines (2).The method is used to provide bitline contacts in a nitride read only memory (NROM<TM>) chip. |
申请公布号 |
WO02097890(A3) |
申请公布日期 |
2003.10.16 |
申请号 |
WO2002EP05805 |
申请日期 |
2002.05.27 |
申请人 |
INFINEON TECHNOLOGIES AG;SCHWALBE, GRIT;WANG, KAE-HORNG;FELDNER, KLAUS;STEIN VON KAMIENSKI, ELARD |
发明人 |
SCHWALBE, GRIT;WANG, KAE-HORNG;FELDNER, KLAUS;STEIN VON KAMIENSKI, ELARD |
分类号 |
H01L23/52;H01L21/3205;H01L21/60;H01L21/768;H01L21/8239;H01L21/8246;H01L21/8247;H01L27/105;H01L27/112;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L23/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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