Creating column coherency for burst building in a memory access command stream

摘要

A buffer facilitates reordering of memory access commands in a memory access command stream so as to create column coherencies that may be exploited with burst-mode memory cycles. A multi-column data storage buffer is provided. Storage control circuitry stores data associated with a memory access command into the multi-column data storage buffer at a column that corresponds to at least one of the LSBs of the column address associated with the memory access command. Flush control circuitry flushes the data storage buffer, when required, in column order. Each entry in the data storage buffer is associated with a unique valid bit. At flush time, the flush control circuitry analyzes the valid bits to determine an appropriate burst type for executing the memory access commands represented by the flushed buffer contents. The flush control circuitry may indicate the determined burst type to memory controller hardware by means of a burst type flag. The data storage buffer may include multiple lines. Each line is associated with one line in a multi-line column address storage buffer. The storage control circuitry stores at least some of the MSBs of the data column addresses in the column address storage buffer. Column address comparison circuitry determines whether at least some of the MSBs of the column address of an incoming memory access command match those currently stored in a line of the column address storage buffer, and if so, select the matching line, but if not, select an unused line.