| 摘要 |
PURPOSE:To prevent a through-current from flowing when a control clock is fixed by detecting the stop state where the control clock reaches a DC level and controlling the conduction of a switching element throughout this stop period. CONSTITUTION:The switching element T10 is interposed between the output terminal of a clocked inverter circuit C2 which is driven and controlled with the control clock and one high or low power source potential supply terminal, and the stop state wherein the control clock reaches the DC level is detected to control the conduction of the switching element T10 by a control means 11 throughout the stop period. Namely, the switching element is turned on to hold the output terminal of the clocked inverter circuit at a high or low potential, so even if the control clock is broken, the output of the clocked inverter circuit C2 never varies to an intermediate potential. Consequently, a through-current is prevented from flowing between power source terminals. |
