发明名称 |
Low-capacitance bonding pad for semiconductor device |
摘要 |
A low-capacitance bonding pad for a semiconductor device. A diffusion region is formed in a substrate, and a bonding pad is formed on the substrate and aligned with the diffusion region. The bonding pad is made from a stacked metal layer and a metal layer. The stacked metal layer is made from a plurality of metal layers and a plurality of dielectric layers, and the metal layers and the dielectric layers are stacked alternately. The metal layers stacked in the stacked metal layer are formed with small areas. Each of the metal layers stacked in the stacked metal layer is coupled with the adjacent metal layer by via plugs.</PTEXT>
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申请公布号 |
US6633087(B2) |
申请公布日期 |
2003.10.14 |
申请号 |
US20010818455 |
申请日期 |
2001.03.27 |
申请人 |
INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE |
发明人 |
KER MING-DOU;JIANG HSIN-CHIN |
分类号 |
H01L23/485;H01L23/522;(IPC1-7):H01L29/40 |
主分类号 |
H01L23/485 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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