Integration of data prefetching and modulo scheduling using postpass prefetch insertion

摘要

The present invention integrates data prefetching into a modulo scheduling technique to provide for the generation of assembly code having improved performance. Modulo scheduling can produce optimal steady state code for many important cases by sufficiently separating defining instructions (producers) from using instructions (consumers), thereby avoiding machine stall cycles and simultaneously maximizing processor utilization. Integrating data prefetching within modulo scheduling yields high performance assembly code by prefetching data from memory while at the same time using modulo scheduling to efficiently schedule the remaining operations. The invention integrates data prefetching into modulo scheduling by postponing prefetch insertion until after modulo scheduling is complete. Actual insertion of the prefetch instructions occurs in a postpass after the generation of appropriate prologue-kernel-epilogue code. Concurrently, appropriate rules are employed to permit the co-existence of data prefetching instructions within the modulo scheduled code. The present invention also simplifies the addition of data prefetching capabilities to a compiler already capable of modulo scheduling.