发明名称 CRYPTOGRAPH SYSTEM AND DATA TRANSFER CONTROLLER
摘要 PROBLEM TO BE SOLVED: To provide a cryptograph system which can suppress deterioration in the cipher strength of a common key cipher system, an increase in a circuit scale, and a deterioration in a processing speed, and to provide a data transfer controller. SOLUTION: The cryptograph system 100 includes a cipher processing circuit 110, a key memory circuit 120 and a key selecting circuit 130. The cipher processing circuit 110 carries out cipher processing or decoding processing using a key for one set supplied by the common key cipher system. The key memory circuit 120 stores a plurality of key sets generated by the common cipher system from a plurality of common secret keys. The key selecting circuit 130 selects one key set from the plurality of key sets stored in the key memory circuit 120 on the basis of a given key selection signal, and supplies the set to the cipher processing circuit 110. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003288009(A) 申请公布日期 2003.10.10
申请号 JP20020092088 申请日期 2002.03.28
申请人 SEIKO EPSON CORP 发明人 KUMAGAI TOMONORI;TANAKA TARO
分类号 G09C1/00;H04L9/14;(IPC1-7):G09C1/00 主分类号 G09C1/00
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