| 摘要 |
<P>PROBLEM TO BE SOLVED: To operate an assembly of registers like RAMs when the functions of a CPU, RAMs, ROMs and the like are assembled onto one chip, while also making these functional components occupy less substrate area than if they are separately positioned on substrates. <P>SOLUTION: This arithmetic processing unit includes a register array 11 having a plurality of registers for retaining certain values according to a write address Aw and a write control signal Sw and outputting the values according to a read address Ar; an ALU 12 for computing the values; a decoder 13 for decoding arithmetic instructions from an arithmetic program AP intended for operating the ALU 12; and an instruction execution control part 50 which controls the register array 11 and the ALU 12 to execute the arithmetic instructions. The instruction execution control part 50 executes a register-to- register addressing process for selecting one register according to the arithmetic instructions and selecting the other register according to the value retained by the one register. <P>COPYRIGHT: (C)2004,JPO |
