发明名称 PHASE COMPARISON METHOD, PHASE COMPARISON CIRCUIT, AND PLL CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To offer a phase comparison circuit which generates a signal to individ ually control capacity values of plural varactors arranged in a voltage controlled oscillator. <P>SOLUTION: A plurality of phase difference detection circuits 101, 102, and 103 respond to a corresponding activation signal, are activated in order, and generate a voltage signal Vtune depending to elapse time of the activation signal from the generated point and a trigger signal Trg showing that the voltage signal reaches a predetermined value. A main signal SIG is input to the first stage phase difference detection circuit 101 as an activation signal, and a trigger signal created by the preceding phase difference detection circuit, is input to the latter stage phase difference detection circuits 102 and 103 as the activation signal. Respective phase difference detection circuits 101, 102 and 103 are non-activated responding to an out signal 'out' made by a reference signal REF, and respectively output a voltage signal Vtune at the point of non-activation as a phase comparison signal. <P>COPYRIGHT: (C)2004,JPO
申请公布号 JP2003289246(A) 申请公布日期 2003.10.10
申请号 JP20020092067 申请日期 2002.03.28
申请人 NEC COMPOUND SEMICONDUCTOR DEVICES LTD 发明人 GLENN KEIJI MURATA
分类号 H03K5/26;H03D13/00;H03L7/087;H03L7/091;H03L7/099;H03L7/18 主分类号 H03K5/26
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