发明名称 MULTI SUCCESSIVE RESET CIRCUIT
摘要 PURPOSE: A multi successive reset circuit is provided to satisfy various initial conditions by using a commercial reset controller and control logics. CONSTITUTION: A multi successive reset circuit includes a first and a second reset signal generation blocks(20,30) for generating a plurality of reset signals with a reset period different from each other, a buffer(50), a buffer control circuit(40) for controlling the output port of the buffer(50) and a logic gate(60). The buffer(50) connected to the second reset signal generation block(30) controls the reset signal of the second signal generation block(30). And, the logic gate(60) connected to the output of the buffer(50) and the output of the first reset signal generation block(20) for generating two outputs therefrom as one signal.
申请公布号 KR20030079442(A) 申请公布日期 2003.10.10
申请号 KR20020018475 申请日期 2002.04.04
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 HAN, SUN SEOP;KIM, SEON GI
分类号 H03K17/22;(IPC1-7):H03K17/22 主分类号 H03K17/22
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