APPARATUS AND METHOD FOR DRIVING FERROELECTRIC MEMORY

摘要

PROBLEM TO BE SOLVED: To provide an apparatus and method for driving a ferroelectric memory that can secure an enough read/write cycle time of an address during a chip is driven. SOLUTION: The ferroelectric memory driving apparatus includes: an address latch block for latching a buffered address signal by a feedback cell operation pulse; an ATDSUM (address transition detection summation) value outputting block for generating an address transition detection signal ATD by detecting change of an address signal, and for outputting summation of ATD (address transition) pulses generated by a plurality of addresses; a pulse width extension/ control pulse generating block for extending a pulse width of the ATDSUM value and outputting a chip control pulse by using an extended pulse signal; and a cell operation pulse generating block for generating a cell operating pulse with a pulse width required on a read/write chip operation by using the chip control pulse. COPYRIGHT: (C)2004,JPO