发明名称 CRYPTOGRAPH SYSTEM AND DATA TRANSFER CONTROLLER
摘要 PROBLEM TO BE SOLVED: To provide a cryptograph system which obtains optimum cipher strength and an optimum processing speed corresponding to data to be processed and to provide a data transfer controller. SOLUTION: The cryptograph system 130 includes a process switching signal generating circuit 110, a processing circuit 120, a data control circuit 132 and a counter circuit 134. The process switching signal generating circuit 110 generates a process switching signal on the basis of a given switching signal. The processing circuit 120 generates a-times cipher processing data obtained by applying the cipher processing of a common key cipher system (a) times ((a) is a positive integer) to input data inputted in the unit of a data block or b-times cipher processing data obtained by applying the cipher processing of the common key cipher system (b) times ((b) is a positive integer larger than (a)), and outputs any one on the basis of the process switching signal. The switching signal is generated on the basis of stored position information in an access unit when a given storage device performs the write or read of the converted data in the given access unit. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003288012(A) 申请公布日期 2003.10.10
申请号 JP20020092090 申请日期 2002.03.28
申请人 SEIKO EPSON CORP 发明人 KUMAGAI TOMONORI;TANAKA TARO
分类号 G09C1/00;(IPC1-7):G09C1/00 主分类号 G09C1/00
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