摘要 |
A VLIW processor comprising a plurality of functional units (1, 3, 5, 7), a distributed register file (9, 11, 13, 15) accessible by the functional units (1, 3, 5, 7), a partially connected communication network (17) for coupling the functional units (1, 3, 5, 7) and selected parts of the distributed register file (9, 11, 13, 15), characterized in that the VLIW processor further comprises a communication device (29) for coupling the functional units (1, 3, 5, 7) and the distributed register file (9, 11, 13, 15).
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申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.V.;BEKOOIJ, MARCO, J., G.;OLIVEIRA KASTRUP PEREIRA, BERNARDO |
发明人 |
BEKOOIJ, MARCO, J., G.;OLIVEIRA KASTRUP PEREIRA, BERNARDO |