| 摘要 |
<p>The invention provides a device and method for data processing. The data processing device has a local memory which has part of address locations of the main memory as its address location, which is accessed by a CPU, and which can obtain same effect as cache memory without having cache directory, a comparator which determines whether or not an address to be accessed is an address allocated in the local memory when the CPU requests memory access to the main memory, a flip-flop which indicates that the data processing device is in the initial program loading mode or the in-operation mode, and a memory control unit which controls to copy data stored in a specific part of address locations of the main memory into the local memory by reading out an instruction (loader) from the main memory when the flip-flop indicates the initial program loading mode, and which controls to write data in the main memory by reading out an instruction (if stored) from the local memory when the flip-flop indicates the in-operation mode. The method for processing data has the step of loading data from an external memory into the main memory at initial program loading, the step of copying part of data stored in the main memory to the local memory, and the step of reading out an instruction from the local memory and writing data in the main memory when the instruction to be read out in the in-operation mode is stored in the local memory, and reading out an instruction from the main memory and writing data in the main memory when the instruction is not stored in the local memory.</p> |
| 申请人 |
KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP |
发明人 |
SATO, FUMITAKA, OOME, TOKYO, JP;NAGURA, KUNIHIRO, TOKOROZAWA, SAITAMA, JP |
