| 摘要 |
A semiconductor device for memory test with changing address information that writes and reads data to and from a memory array in accordance with address information includes an address converting circuit that makes a predetermined conversion of a part or the whole of address information in accordance with a control signal for a test to generate new address information. In the address converting circuit, the memory array is divided into a test program region and a memory region to be tested in accordance with a control signal for the test. For example, the address converting circuit interchanges a predetermined number of address bits of a line of bits constituting the address information with each other to generate new address information.
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