发明名称 MOS TRANSISTOR HAVING AN ALIGNED SILICIDE AT SOURCE AND DRAIN REGION AND METHOD FOR MANUFACTURING THE SAME
摘要 PURPOSE: An MOS(Metal Oxide Semiconductor) transistor having an aligned silicide at a source and drain region and a method for manufacturing the same are provided to reduce resistance by carrying out a salicide process at even the lightly doped impurity region of the MOS transistor. CONSTITUTION: After forming an isolation region(22) at a substrate(20) for defining an active region, a gate isolating layer(24) and a gate electrode(26) are sequentially formed at the upper portion of the active region. A lightly doped impurity region(28) is formed at the active region by implanting lightly doped dopants into the resultant structure using the gate electrode and the gate isolating layer as a mask. After forming a gate spacer at both sidewalls of the gate electrode, a heavily doped impurity region(40) is formed at the active region by implanting heavily doped dopants into the resultant structure. After forming an 'L' shaped spacer at both sidewalls of the gate electrode, the first silicide layer(42a) is formed at the upper surface of the heavily doped impurity region. Then, the second silicide layer(46) is formed at the predetermined portion of the lightly doped impurity region.
申请公布号 KR20030078205(A) 申请公布日期 2003.10.08
申请号 KR20020017088 申请日期 2002.03.28
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, YEONG GI;SHIN, HEON JONG;SHIN, HWA SUK
分类号 H01L29/78;H01L21/336;(IPC1-7):H01L29/78 主分类号 H01L29/78
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