| 摘要 |
PURPOSE: A voltage switch circuit is provided, which reduces a peak current and at the same time improves an access time. CONSTITUTION: According to the voltage switch circuit, an inverter(21) inverts a voltage switch control signal(wrd), and the first NMOS transistor(22) has a gate connected to an output port of the inverter and a drain connected to a ground port and a source as an output prot. The first PMOS transistor(23) has a source connected to the source of the first NMOS transistor and a drain connected to a power supply port(VPP). The second PMOS transistor(24) has a gate connected to the first NMOS transistor and a drain connected to the power supply port and a source connected to the gate of the first PMOS transistor. The second NMOS transistor(25) has a source connected to the source of the second PMOS transistor and a drain connected to the ground port and a gate connected to the input signal(wrd). And an inversion delay part(26) delays an output signal of the inverter, and the third PMOS transistor(27) for power switching has a gate connected to an output port of the delay part and a drain connected to the power supply part and a source connected to the drains of the first and the second PMOS transistor in common.
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