| 摘要 |
A semiconductor test system for testing semiconductor devices has a plurality of different tester modules and an algorithmic pattern generator (ALPG) for generating an algorithmic pattern specific to an intended memory, thereby achieving a low cost and application specific memory test system. The semiconductor test system includes two or more tester modules whose performances are different from one another, an ALPG module for generating an algorithmic pattern which is specific to the memory, a test system main frame to accommodate a combination of the tester modules and the ALPG module, a test fixture for electrically connecting the tester modules and a device under test, a performance board provided on the test fixture for mounting the device under test, and a host computer for controlling an overall operation of the test system by communicating with the tester modules through a tester bus.
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