发明名称 Field freeze filter implementation
摘要 A circuit for freezing a video frame having a first field interlaced with a second field. The circuit generally comprises a memory and a filter. The memory may be configured to present a plurality of coefficient signals that define (i) a first coefficient set for the first field and (ii) a second coefficient set for the second field. The filter may be configured to present a new frame in place of the video frame. The new frame may be generated from either (i) the first field and the first coefficient set in response to freezing on the first field or (ii) the second field and the second coefficient set in response to freezing on the second field.
申请公布号 US6630965(B1) 申请公布日期 2003.10.07
申请号 US20010794852 申请日期 2001.02.27
申请人 LSI LOGIC CORPORATION 发明人 XUE NING;NEUMAN DARREN D.;DIERKE GREGG
分类号 H04N5/14;H04N5/44;H04N9/64;(IPC1-7):H04N5/44 主分类号 H04N5/14
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