发明名称 Method for forming capacitor of semiconductor memory device using electroplating method
摘要 A method of forming a capacitor of a semiconductor memory device is provided. In the capacitor formation, a insulating layer is deposited over a semiconductor substrate, and patterned into a insulating pattern with a hole that exposes the semiconductor substrate. Next, a seed layer for use in forming a lower electrode is formed over the surface of the exposed semiconductor substrate, the inner walls of the hole, and the insulating pattern, and a plating mask layer is selectively formed on the seed layer deposited on the insulating pattern, and on a portion of the seed layer from the upper edges of the insulating pattern deposited along the sidewalls of the hole to a predetermined depth, such that the seed layer formed in the hole is exposed. The plating mask layer is formed by a physical vapor deposition (PVD) or a plasma chemical vapor deposition (CVD) method. Next, a conductive layer is formed on the exposed seed layer by electroplating, and then etched to form a conductive pattern and a seed pattern separated by a unit cell. The insulating pattern formed on the outer walls of the hole is removed to complete a lower electrode of the capacitor formed of the conductive pattern. Then, a dielectric layer and an upper electrode are formed in succession on the lower electrode. Accordingly, the lower electrode conductive pattern can be formed just in a hole with a high aspect ratio by the electroplating, without occurrence of a void in the hole.
申请公布号 US6630387(B2) 申请公布日期 2003.10.07
申请号 US20010812407 申请日期 2001.03.19
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 HORII HIDEKI
分类号 H01L21/02;H01L21/311;(IPC1-7):H01L21/20 主分类号 H01L21/02
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