发明名称 DIRECT MEMORY ACCESS CONTROLLER
摘要 <p>PURPOSE:To places devices other than objects of transfer in a stand-by state and reduce the power consumption of a system by comparing the content of a 1st register which specifies a direct memory access channel number to be transferred with the content of a 2nd register stored with a direct memory access channel number current in transfer and sending a stand-by request to the devices which are not in the transfer. CONSTITUTION:When a DMA transfer request from an external peripheral device is detected, a hold request signal is outputted to a CPU. Then when a hold permission signal is inputted from the CPU, an internal control circuit 1 determines a priority level and outputs a DMA permission signal DAK from a bus control circuit 2 to the peripheral device to start DMA transfer. At this time, a DMA transfer cycle is determined by referring to a control register group 8 and an external device is determined by an address register 14. A comparator 11 compares the values of a stand-by channel register 10 and a channel register 9 with each other and sends the stand-by request signal when they match each other.</p>
申请公布号 JPH0660011(A) 申请公布日期 1994.03.04
申请号 JP19920212930 申请日期 1992.08.10
申请人 NEC CORP 发明人 OGATA KYOJI
分类号 G06F1/32;G06F13/28;(IPC1-7):G06F13/28 主分类号 G06F1/32
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