发明名称 POWER-ON-RESET CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To obtain a power-on-reset circuit enabling secure generation of a power-on-reset signal (one-shot pulse), irrespective of and unaffected by the rise speed of a source voltage. <P>SOLUTION: The power-on-reset circuit is provided with: a first voltage setting section 1 having a first output voltage Va (t) which increases toward a first voltage with a voltage increase of a high voltage-level source VDD; a second voltage setting section 2 having a second output node b for outputting a second output voltage Vb (t) which increases toward a second voltage different from the first voltage with the voltage increase of the high voltage-level source VDD; and a comparator CMP comparing the first output voltage Va (t) with the second output voltage Vb (t) and generating a reset pulse when the comparison results in match. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2003283318(A) 申请公布日期 2003.10.03
申请号 JP20020084558 申请日期 2002.03.25
申请人 TOSHIBA CORP;TOSHIBA LSI SYSTEM SUPPORT KK 发明人 KUREYA SEIICHI;WADA AKIRA
分类号 G06F1/24;H01L21/822;H01L27/04;H03K17/22;(IPC1-7):H03K17/22 主分类号 G06F1/24
代理机构 代理人
主权项
地址