SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To reduce the leak current in MOS transistors used for a logic evaluator in a logic circuit and suppress the rise of a noise voltage to expand the operation margin. SOLUTION: The semiconductor integrated circuit having a synchronous logic circuit composed of a plurality of MOS transistors comprises: a pMOS transistor M1 connected between a power source terminal Vdd and a first node N1 with a clock signal CLK inputted to its gate; an nMOS transistor M2 connected between a ground terminal Vss and a second node N2 with the clock signal CLK inputted to its gate; an nMOS transistor M3 connected between the N1 and a third node N3 with the Vdd inputted to its gate; and a logic evaluator 10 composed of at least one MOS transistor connected between the N2 and N3 with input signals fed to gates of transistors. COPYRIGHT: (C)2004,JPO