发明名称 GRAY CODE COUNTER
摘要 PROBLEM TO BE SOLVED: To provide a gray code counter which has a simple circuit constitution and facilitates designing a circuit of the desired number of bits. SOLUTION: A gray-binary converter 20 converts output signals G0-Gn of gray codes outputted from a holder 10 to binary numbers. A binary arithmetic unit 30 increments the binary number by 1. A binary-gray converter 40 converts signals C0-Cn outputted from the binary arithmetic unit 30 again to gray codes which are then given to the input of the holder 10. When a clock signal CLK falls, the contents in the holder 10 are rewritten to gray codes of numerical values incremented by 1 to obtain output signals G0-Gn of new gray codes. The holder 10, the gray-binary converter 20, the binary arithmetic unit 30 and the binary-gray converter 40 can be constituted each by repeating the same pattern, this facilitating designing a gray code counter of the desired number of bits. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003283331(A) 申请公布日期 2003.10.03
申请号 JP20020084264 申请日期 2002.03.25
申请人 OKI ELECTRIC IND CO LTD 发明人 NAKAMURA HISASHI
分类号 H03K23/48;H03K23/00;H03M7/16;(IPC1-7):H03K23/48 主分类号 H03K23/48
代理机构 代理人
主权项
地址