| 摘要 |
PROBLEM TO BE SOLVED: To provide a sequential comparison type analog to digital conversion circuit capable of conducting analog to digital conversion in high-speed and high accuracy. SOLUTION: A redundant comparison cycle is provided in a comparison cycle for conducting the predetermined number of comparisons, at a conversion sequence for converting an analog input voltage (Vin) to a digital signal. The redundant comparison cycle is additionally arranged at the end of the predetermined number of comparisons or inserted into an ordinary comparison cycle. According to this arrangement, a period in which a converted value is converged to the analog input voltage can be provided when a redundant cycle is added. A result of an accurate final conversion can be generated by error correction, even if an error occurs. COPYRIGHT: (C)2004,JPO
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