发明名称 SYNCHRONOUS DETECTION CIRCUIT USING SWITCH CIRCUIT
摘要 PROBLEM TO BE SOLVED: To extract an information signal with accuracy even when a reception signal is input in a low amplitude level. SOLUTION: By setting the ratio between the gate width Wp of a p-MOS 18 and the gate width Wn of a n-MOS 20 between 1:0.9 to 1:1.1, the capacity between the gate terminal 42 and the source terminal 22 of the p-MOS 18 is set approximately equal to the capacity between the gate terminal 44 and the source terminal 24 of the n-MOS 20. Because the component of a p-channel control signal leaked through the inter-terminal capacity between the gate terminal 42 and the source terminal 22 of the p-MOS 18 is canceled by the component of a n-channel control signal leaked through the inter-terminal capacity between the gate terminal 44 and the source terminal 24 of the n-MOS 20, it becomes possible to suppress generation of an error component in a signal output terminal 12 caused by the leak component of the two control signals. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003283320(A) 申请公布日期 2003.10.03
申请号 JP20020083882 申请日期 2002.03.25
申请人 JAPAN RADIO CO LTD 发明人 TAKAHASHI HIDENORI;MIZUGAKI KEIICHI;MOROHOSHI MITSUNORI;YODA TAMAKI
分类号 H03K17/687;H03D1/22;(IPC1-7):H03K17/687 主分类号 H03K17/687
代理机构 代理人
主权项
地址