发明名称 |
FAILURE SEMICONDUCTOR ANALYZING TOOL AND SYSTEM THEREOF FAILURE SEMICONDUCTOR ANALYZING METHOD, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To accurately grasp a failure position on a semiconductor device to be analyzed and a cause thereof in a short time. SOLUTION: A failure semiconductor analyzing tool or a method using it include at least one or more of wiring design layers, and a user layer for incorporating and displaying an output of a failure semiconductor inspection device or a failure semiconductor analyzing device as data format information. COPYRIGHT: (C)2004,JPO
|
申请公布号 |
JP2003282665(A) |
申请公布日期 |
2003.10.03 |
申请号 |
JP20020079931 |
申请日期 |
2002.03.22 |
申请人 |
HITACHI LTD |
发明人 |
KOMIYA YASUMARO;KIKUCHI SHUJI;MURAOKA SATOSHI |
分类号 |
G01R31/28;H01L21/66;H01L21/82;(IPC1-7):H01L21/66 |
主分类号 |
G01R31/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|