| 摘要 |
The electrically programmable memory (MEM2) comprises a memory array (MA) containing the memory cells (CFi,j) connected to the word lines (WLi) and the bit lines (BLj), and means for programming for registering a set of binary words in a row of memory cells (CFim)1 - CFi,x) connected to the same word line, for erasing the memory cells of the row and then applying several programming cycles to the groups of memory cells of the row. Each programming cycle includes an application of the programming voltage (Vpp) to the memory cells which receive a bit equal to the first logic value (1), and the cells receiving a bit equal to the second logic value (0) which is inverse to the first are left in the erased state. The programming voltage is applied to no more than N memory cells at a time. The programming means inclusive of a programming register (PGR2), a mask register (MREG1), a shift register (SREG), an OR-gate with X inputs (ORX), a counter (CMP), and a sequencer (SEQ), are laid out for registering the bits belonging to different words chosen so that the number of memory cells receiving the programming voltage during the programming cycle is maximum but not greater than N. The selected groups of memory cells comprise a variable number of memory cells, and the number of cells receiving the programming voltage is maximum. In the case of registering an integer number of binary words, the integer number is variable and chosen so that the total number of bits equal to the second logic value is maximum. The programming means are arranged for registering a chain of bits comprising N bits equal to the second logic value. The programming mask is combined bit to bit with the bits of words to register, and comprises the bits of logic value authorizing the programming of memory cells, and the bits of logic value forbidding the programming of memory cells.
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