发明名称 |
SEMICONDUCTOR MEMORY DEVICE |
摘要 |
<P>PROBLEM TO BE SOLVED: To improve a speed of writing operation and reading operation of data in a semiconductor memory device using an MIS transistor as a means for storing charge. <P>SOLUTION: A DRAM cell 10 stores the charge in a channel of a first transistor 11, transfers the charge by a second transistor 12 and a third transistor 13 and accelerates a data transfer speed by alternately using two routes of a route using a first word line WLa connected to a gate of the second transistor 12 and a first bit line BLa connected to a drain of the second transistor 12 and a route using a first word line WLa connected to a gate of the transistor 12 and the first bit line BLa connected to a drain of the transistor 12. <P>COPYRIGHT: (C)2004,JPO |
申请公布号 |
JP2003282732(A) |
申请公布日期 |
2003.10.03 |
申请号 |
JP20020083353 |
申请日期 |
2002.03.25 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
AGATA MASASHI;TAKAHASHI KAZUYA;SHIRAHAMA MASANORI;KURODA NAOKI;SADAKATA HIROYUKI;NISHIHARA RYUJI |
分类号 |
G11C11/401;G11C11/405;H01L21/8242;H01L27/108 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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