发明名称 |
Technique to accelerate learning rate on linearly sorted lookup tables for high speed switches/routers |
摘要 |
A lookup table is modified by either the insertion or deletion of an address. A lookup table modification device receives an update instruction and determines a selected memory section of the lookup table and an address to which the update instruction relates. The selected memory section is updated. The lookup table modification device determines succeeding non-selected memory sections to which the update instruction does not relate, and modifies contents of one address in each of the succeeding non-selected memory sections. The lookup table modification device changes the logical origin of each of the succeeding non-selected memory sections.
|
申请公布号 |
US2003188018(A1) |
申请公布日期 |
2003.10.02 |
申请号 |
US20020108920 |
申请日期 |
2002.03.28 |
申请人 |
GUERRERO MIGUEL A.;MOLEYAR PRABHANJAN |
发明人 |
GUERRERO MIGUEL A.;MOLEYAR PRABHANJAN |
分类号 |
H04L12/56;(IPC1-7):G06F15/173 |
主分类号 |
H04L12/56 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|