| 摘要 |
A semiconductor memory device according to the invention has an active state where data can be read and written and a standby state where the data are retained. It has a memory cell array including a plurality of memory cells arranged in a matrix, and a refresh controller which refreshes data stored in the plurality of memory cells. In the refresh controller, a first refresh cycle generator generates a first refresh cycle, while a second refresh cycle generator which generates a second refresh cycle having a period shorter than the first refresh cycle. A refresh processor performs refresh operation when the refresh operation becomes possible after the first refresh cycle and, when refresh operation is not performed for a longer period than the first refresh cycle, it performs refresh operations successively based on the second refresh cycle in the longer period or after the end of the longer period.
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