| 摘要 |
A method of performing in-place arithmetic, particularly addition and subtraction, on numbers stored in respective consecutive rows of an array processor that has two tags registers. In a first machine cycle per bit, results of logical operations are stored in the tags registers, and the tags registers are shifted to align the intermediate results with other rows. In a second machine cycle per bit, results of further logical operations are stored in the tags registers, and the tags registers are shifted back to align the new intermediate results with the original rows.
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