发明名称 SYSTEM LEVEL IN-SITU INTEGRATED DIELECTRIC ETCH PROCESS PARTICULARLY USEFUL FOR COPPER DUAL DAMASCENE
摘要 An integrated in situ etch process performed in a multichamber substrate processing system having first and second etching chambers. In one embodiment the first chamber includes an interior surface that has been roughened to at least 100 Ra and the second chamber includes an interior surface that has a roughness of less than about 32 Ra. The process includes transferring a substrate having formed thereon in a downward direction a patterned photoresist mask, a dielectric layer, a barrier layer and a feature in the substrate to be contacted into the first chamber where the dielectric layer is etched in a process that encourages polymer formation over the roughened interior surface of the chamber. The substrate is then transferred from the first chamber to the second chamber under vacuum conditions and, in the second chamber, is exposed to a reactive plasma such as oxygen to strip away the photoresist mask deposited over the substrate. After the photoresist mask is stripped, the barrier layer is etched through to the feature to be contacted in the second chamber of the multichamber substrate processing system using a process that discourages polymer formation over the relatively smooth interior surface of the second chamber. All three etching steps are performed in a system level in situ process so that the substrate is not exposed to an ambient between steps. In some embodiments the interior surface of the first chamber has a roughness between 100 and 200 Ra and in other embodiments the roughness of the first chamber's interior surface is between 110 and 160 Ra.
申请公布号 WO03081645(A2) 申请公布日期 2003.10.02
申请号 WO2003US07485 申请日期 2003.03.10
申请人 APPLIED MATERIALS, INC. 发明人 HSIEH, CHANG-LIN;MA, DIANA, XIAOBING;SHIEH, BRIAN, SY YUAN;YIN, GERALD, ZHEYAO;SUN, JENNIFER;THACH, SENH;LUO, LEE;BJORKMAN, CLAES, H.
分类号 H01L21/00;H01L21/311;H01L21/768 主分类号 H01L21/00
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