| 摘要 |
The output of drivers which are used to drive the input signals to a multiplexed signal line are combined in a logic OR gate or a logic AND gate prior to connection to the input of the multiplexed line. The inactive state of drivers connected through a logic OR gate is set to 0 and the inactive state of drivers connected through a logic AND gate is set to 1. Bus contention between drivers is eliminated and the bandwidth of the multiplexed serial bus is increased because of the reduced wait time between driver transitions. Power dissipation in transition is reduced and the bus can have a programmable inactive state on a bus to allow for 1, 0 or High Z to indicate the inactive state.
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