| 摘要 |
The invention relates to a method for optimising the overlay adjustment of two masking planes in a photolithographic process for the production of an integrated circuit comprising the following steps: Preparation of a substrate (S) with at least one first masking plane (ME), which is structured by means of illumination of a first mask with a first illuminating device; Alignment of a second mask (M) with the first masking plane (ME), provided with a second illuminating device, for the structuring of a second masking plane; Measurement of the overlay between the first masking plane (ME), the second masking plane and the second mask (M); Analysis of the measured overlays with reference to the previous generated error data (FAD, FXD, FBD, FYD) on errors (FA, FX, FB, FY) for the first and second masks and/or errors for the first and second illumination devices and carrying out a correction of the alignment of the second mask (M) depending on the result of the analysis. |
