发明名称 |
Bit line and manufacturing method thereof |
摘要 |
A method for manufacturing a bit line is disclosed. Such a method includes: forming a layer-insulation layer on the surface of a semiconductor substrate; forming a contact hole on a predetermined region of the layer-insulation layer; forming a first conductive layer on the upper surface of the layer-insulation layer and inside the contact hole, the first conductive layer being made of a metal; forming a second conductive layer on the upper surface of the first conductive layer, the second conductive layer being made of a metal; and patterning the first and the second conductive layers together. The bit line made of a metal is manufactured to be integrated with a plug. The first conductive layer is formed by sputtering while the second conductive layer is formed by chemical vapor deposition, thereby shortening the process and improving the characteristics of the bit line.
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申请公布号 |
US6627537(B2) |
申请公布日期 |
2003.09.30 |
申请号 |
US20010777703 |
申请日期 |
2001.02.07 |
申请人 |
HYNIX SEMICONDUCTOR, INC. |
发明人 |
JIN WON-HWA;KIM KEUN-SU |
分类号 |
H01L21/28;H01L21/205;H01L21/285;H01L21/3205;H01L21/768;H01L21/8242;H01L23/485;H01L23/52;H01L27/108;(IPC1-7):H01L21/476 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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