发明名称 |
Method and apparatus for a scannable hybrid flip flop |
摘要 |
A scannable flip flop for space-based LSSD testable integrated circuits. A scannable register can be formed from the scannable flip flops. The scannable flip flops can be radiation hardened. Each scannable flip flop can include a 2:1 input multiplexer, a first latch and a second latch. The input multiplexer is coupled to the first latch by a pair of pass gates. The pass gates are gated by a first clock input signal. A second pass gate pair couples the first latch to the second latch. A second clock input signal gates the second pass gate pair. The first and second clock input signals are non-overlapping. The latch can be employed in edge triggered logic ECAD tools for designing IC. The resulting IC logic can be tested using LSSD test testing techniques and patterns.
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申请公布号 |
US6629276(B1) |
申请公布日期 |
2003.09.30 |
申请号 |
US20000559660 |
申请日期 |
2000.04.28 |
申请人 |
BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION, INC. |
发明人 |
HOFFMAN JOSEPH A.;YODER JOSEPH W. |
分类号 |
G01R31/3185;H03K5/1252;H03K5/151;H03K19/003;(IPC1-7):G01R31/28;H03L7/00;G06F1/04 |
主分类号 |
G01R31/3185 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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