发明名称 Fast program to program verify method
摘要 In the present invention a new method for program and program verify is described. The threshold voltage of the memory cell is shifted up and then measured with minimal charging and discharging of the bit lines and control gate lines. Bit line to control gate line capacitance is also used to reduce the number of voltage references needed. Program current is reduced by use of a load device coupled to the source diffusion. The result is increased program bandwidth with lower high voltage charge pump current consumption.
申请公布号 US6628546(B2) 申请公布日期 2003.09.30
申请号 US20030371836 申请日期 2003.02.20
申请人 HALO LSI, INC. 发明人 OGURA SEIKI;OGURA TOMOKO;OGURA NORI
分类号 G11C16/02;G11C16/04;G11C16/06;G11C16/12;G11C16/34;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/04;G11C16/08 主分类号 G11C16/02
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