发明名称 Self-aligned floating gate poly for a flash E2PROM cell
摘要 Method and apparatus for isolating active regions in an electrically programmable and erasable memory device. A first layer of insulating material is formed on a substrate. A layer of conductive material is formed on the first layer of insulating material. A plurality of spaced apart trenches are formed through the first layer of insulating material, the layer of conductive material, and into the substrate. A second layer of insulation material is formed on sidewall portions of the trenches. A block of insulation material is formed in the trenches. For each of the trenches, an edge portion of the layer of conductive material extends over and overlaps with the first layer of insulating material and possibly a portion of the insulation material block by a predetermined distance Delta. For each of the trenches, the predetermined distance Delta is selected so that after back end processing is performed to the substrate and the conductive layer, the edge portion of the conductive layer is aligned to the sidewall portion of the isolation trench.
申请公布号 US6627942(B2) 申请公布日期 2003.09.30
申请号 US20010916423 申请日期 2001.07.26
申请人 SILICON STORAGE TECHNOLOGY, INC 发明人 WANG CHIH HSIN
分类号 H01L21/76;H01L21/762;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L29/788 主分类号 H01L21/76
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